PIC18F67J11-IPT Datasheet, PDF (131/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
REGISTER 10-1: ODCON1: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 1
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
CCP5OD CCP4OD ECCP3OD ECCP2OD
bit 7
R/W-0
ECCP1OD
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
bit 4-3
bit 2-0
Unimplemented: Read as ‘0’
CCP5OD:CCP4OD: CCPx Open-Drain Output Enable bits
1 = Open-drain output on CCPx pin (Capture/PWM modes) enabled
0 = Open-drain output disabled
ECCP3OD:ECCP1OD: ECCPx Open-Drain Output Enable bits
1 = Open-drain output on ECCPx pin (Capture mode) enabled
0 = Open-drain output disabled
REGISTER 10-2: ODCON2: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 2
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
—
U2OD
bit 7
R/W-0
U1OD
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-2
bit 1-0
Unimplemented: Read as ‘0’
U2OD:U1OD: EUSARTx Open-Drain Output Enable bits
1 = Open-drain output on TXx pin enabled
0 = Open-drain output disabled
REGISTER 10-3: ODCON3: PERIPHERAL OPEN-DRAIN CONTROL REGISTER 3
U-0
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
—
SPI2OD
bit 7
R/W-0
SPI1OD
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-2
bit 1-0
Unimplemented: Read as ‘0’
SPI2OD:SPI1OD: SPI Open-Drain Output Enable bits
1 = Open-drain output on SDOx pin enabled
0 = Open-drain output disabled
© 2009 Microchip Technology Inc.
DS39778D-page 131