PIC18F67J11-IPT Datasheet, PDF (23/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
TABLE 1-4: PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
80-TQFP ^{Type Type}
Description
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
30
I/O TTL
Digital I/O.
I Analog Analog input 0.
RA1/AN1
RA1
AN1
29
I/O TTL
Digital I/O.
I Analog Analog input 1.
RA2/AN2/VREF-
RA2
AN2
VREF-
28
I/O TTL
Digital I/O.
I Analog Analog input 2.
I Analog A/D reference voltage (low) input.
RA3/AN3/VREF+
RA3
AN3
VREF+
27
I/O TTL
Digital I/O.
I Analog Analog input 3.
I Analog A/D reference voltage (high) input.
RA4/PMD5/T0CKI
RA4
PMD5⁽⁷⁾
T0CKI
34
I/O ST
Digital I/O.
I/O TTL
Parallel Master Port data.
I
ST
Timer0 external clock input.
RA5/PMD4/AN4
RA5
PMD4⁽⁷⁾
AN4
33
I/O TTL
Digital I/O.
I/O TTL
Parallel Master Port data.
I Analog Analog input 4.
RA6
—
—
—
See the OSC2/CLKO/RA6 pin.
RA7
—
—
—
See the OSC1/CLKI/RA7 pin.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).
© 2009 Microchip Technology Inc.
DS39778D-page 23