PIC18F67J11-IPT Datasheet, PDF (145/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
TABLE 10-14: PORTF FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RF1/AN6/
C2OUT
RF1
0
O
DIG LATF<1> data output; not affected by analog input.
1
I
ST PORTF<1> data input; disabled when analog input enabled.
AN6
1
I
ANA A/D input channel 6. Default configuration on POR.
C2OUT
x
O
DIG Comparator 2 output.
RF2/PMA5/
RF2
AN7//C1OUT
0
O
DIG LATF<2> data output; not affected by analog input.
1
I
ST PORTF<2> data input; disabled when analog input enabled.
PMA5
x
O
DIG Parallel Master Port address.
AN7
1
I
ANA A/D input channel 7. Default configuration on POR.
C1OUT
x
O
DIG Comparator 1 output.
RF3/AN8/
C2INB
RF3
0
O
DIG LATF<3> data output; not affected by analog input.
1
I
ST PORTF<3> data input; disabled when analog input enabled.
AN8
1
I
ANA A/D input channel 8. Default configuration on POR.
C2INB
x
I
ANA Comparator 2 input B.
RF4/AN9/
C2INA
RF4
0
O
DIG LATF<4> data output; not affected by analog input.
1
I
ST PORTF<4> data input; disabled when analog input enabled.
AN9
1
I
ANA A/D input channel 9. Default configuration on POR.
C2INA
x
I
ANA Comparator 2 input A.
RF5/PMD2/
RF5
0
AN10/C1INB/
CVREF
1
PMD2⁽¹⁾
x
O
DIG LATF<5> data output; not affected by analog input. Disabled when
CVREF output enabled.
I
ST PORTF<5> data input; disabled when analog input enabled. Disabled
when CVREF output enabled.
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
AN10
1
I
ANA A/D input channel 10 and Comparator C1+ input. Default input
configuration on POR.
C1INB
x
I
ANA Comparator 1 input B.
CVREF
x
O
ANA Comparator voltage reference output. Enabling this feature disables
digital I/O.
RF6/PMD1/
RF6
0
AN11/C1INA
1
PMD1⁽¹⁾
x
O
DIG LATF<6> data output; not affected by analog input.
I
ST PORTF<6> data input; disabled when analog input enabled.
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
AN11
1
I
ANA A/D input channel 11 and comparator C1- input. Default input
configuration on POR; does not affect digital output.
C1INA
x
I
ANA Comparator 1 input A.
RF7/PMD0/
RF7
0
SS1
1
PMD0⁽¹⁾
x
O
DIG LATF<7> data output.
I
ST PORTF<7> data input.
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
SS1
1
I
TTL Slave select input for MSSP1 module.
Legend:
Note 1:
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate PMP configuration when the PMPMX Configuration bit = 0; available on 80-pin devices only.
© 2009 Microchip Technology Inc.
DS39778D-page 145