PIC18F67J11-IPT Datasheet, PDF (148/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
TABLE 10-17: SUMMARY OF REGISTERS ASSOCIATED WITH PORTG
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PORTG
RDPU REPU RJPU⁽¹⁾ RG4
RG3
RG2
RG1
LATG
—
—
—
LATG4 LATG3 LATG2 LATG1
TRISG
—
—
— TRISG4 TRISG3 TRISG2 TRISG1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTG.
Note 1: Unimplemented on 64-pin devices, read as ‘0’.
Bit 0
Reset
Values on
Page:
RG0
61
LATG0
60
TRISG0
60
10.9 PORTH, LATH and
TRISH Registers
Note: PORTH is available only on 80-pin
devices.
PORTH is an 8-bit wide, bidirectional I/O port. PORTH
pins <3:0> are digital only and tolerate voltages up to
5.5V.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
When the external memory interface is enabled, four of
the PORTH pins function as the high-order address
lines for the interface. The address output from the
interface takes priority over other digital I/O. The
corresponding TRISH bits are also overridden. PORTH
pins, RH4 through RH7, are multiplexed with analog
converter inputs. The operation of these pins as analog
inputs is selected by clearing or setting the
corresponding bits in the ANCON1 register. RH2 to
RH6 are multiplexed with the Parallel Master Port and
RH4 to RH6 are multiplexed as comparator inputs.
PORTH can also be configured as the alternate
Enhanced PWM output channels B and C for the
ECCP1 and ECCP3 modules. This is done by clearing
the ECCPMX Configuration bit.
EXAMPLE 10-8: INITIALIZING PORTH
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
MOVLW
MOVWF
PORTH
; Initialize PORTH by
; clearing output
; data latches
LATH
; Alternate method to
; clear output latches
WDTCON,ADSHR ; Enable write/read to
; the shared SFR
F0h
; Configure PORTH as
ANCON1
; digital I/O
WDTCON,ADSHR ; Disable write/read to
; the shared SFR
0CFh
; Value used to initialize
; data direction
TRISH
; Set RH<3:0> as inputs
; RH<5:4> as outputs
; RH<7:6> as inputs
DS39778D-page 148
© 2009 Microchip Technology Inc.