PIC18F67J11-IPT Datasheet, PDF (30/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
TABLE 1-4: PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
80-TQFP ^{Type Type}
Description
PORTH is a bidirectional I/O port.
RH0/A16
RH0
A16
79
I/O ST
Digital I/O.
O TTL
External memory address/data 16.
RH1/A17
RH1
A17
80
I/O ST
Digital I/O.
O TTL
External memory address/data 17.
RH2/A18/PMD7
RH2
A18
PMD7⁽⁷⁾
1
I/O ST
Digital I/O.
O TTL
External memory address/data 18.
I/O TTL
Parallel Master Port data.
RH3/A19/PMD6
RH3
A19
PMD6⁽⁷⁾
2
I/O ST
Digital I/O.
O TTL
External memory address/data 19.
I/O TTL
Parallel Master Port data.
RH4/PMD3/AN12/
P3C/C2INC
RH4
PMD3⁽⁷⁾
AN12
P3C⁽⁵⁾
C2INC
22
I/O ST
I/O TTL
I Analog
O
—
I Analog
Digital I/O.
Parallel Master Port address.
Analog input 12.
ECCP3 PWM output C.
Comparator 2 input C.
RH5/PMBE/AN13/
P3B/C2IND
RH5
PMBE⁽⁷⁾
AN13
P3B⁽⁵⁾
C2IND
21
I/O ST
O
—
I Analog
O
—
I Analog
Digital I/O.
Parallel Master Port byte enable.
Analog input 13.
ECCP3 PWM output B.
Comparator 2 input D.
RH6/PMRD/AN14/
P1C/C1INC
RH6
PMRD⁽⁷⁾
AN14
P1C⁽⁵⁾
C1INC
20
I/O ST
I/O
—
I Analog
O
—
I Analog
Digital I/O.
Parallel Master Port read strobe.
Analog input 14.
ECCP1 PWM output C.
Comparator 1 input C.
RH7/PMWR/AN15/P1B
RH7
PMWR⁽⁷⁾
AN15
P1B⁽⁵⁾
19
I/O ST
Digital I/O.
I/O
—
Parallel Master Port write strobe.
I Analog Analog input 15.
O
—
ECCP1 PWM output B.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).
DS39778D-page 30
© 2009 Microchip Technology Inc.