PIC18F67J11-IPT Datasheet, PDF (415/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
FIGURE 27-15: EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
SSx
70
SCKx
(CKP = 0)
83
71
72
SCKx
(CKP = 1)
SDOx
80
MSb
bit 6 - - - - - - 1
SDI
Note:
75, 76
MSb In
74
73
bit 6 - - - - 1
Refer to Figure 27-3 for load conditions.
LSb
77
LSb In
TABLE 27-21: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
70
TSSL2SCH, SSx ↓ to SCKx ↓ or SCKx ↑ Input
TSSL2SCL
3 TCY
—
70A TSSL2WB SSx ↓ to write to SSPxBUF
3 TCY
—
71
TSCH
SCKx Input High Time
Continuous 1.25 TCY + 30 —
71A
Single byte
40
—
72
TSCL
SCKx Input Low Time
Continuous 1.25 TCY + 30 —
72A
Single byte
40
—
73
TDIV2SCH, Setup Time of SDIx Data Input to SCKx Edge
TDIV2SCL
100
—
73A TB2B
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 TCY + 40 —
74
TSCH2DIL, Hold Time of SDIx Data Input to SCKx Edge
TSCL2DIL
100
—
75
TDOR
SDOx Data Output Rise Time
—
25
76
TDOF
SDOx Data Output Fall Time
—
25
77
TSSH2DOZ SSx ↑ to SDOx Output High-Impedance
10
50
80
TSCH2DOV, SDOx Data Output Valid after SCKx Edge
TSCL2DOV
—
50
83
TSCH2SSH, SSx ↑ after SCKx Edge
TSCL2SSH
1.5 TCY + 40 —
Note 1: Requires the use of Parameter #73A.
2: Only if Parameter #71A and #72A are used.
ns
ns
ns
ns (Note 1)
ns
ns (Note 1)
ns
ns (Note 2)
ns
ns
ns
ns
ns
ns
© 2009 Microchip Technology Inc.
DS39778D-page 415