PIC18F67J11-IPT Datasheet, PDF(57/448 Page) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

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PIC18F67J11-IPT Datasheet, PDF (57/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

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PIC18F87J11 FAMILY

TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET Instruction,

Stack Resets,

CM Resets

Wake-up via WDT

or Interrupt

TOSU

TOSH

TOSL

STKPTR

PCLATU

PCLATH

PCL

TBLPTRU

TBLPTRH

TBLPTRL

TABLAT

PRODH

PRODL

INTCON

INTCON2

INTCON3

INDF0

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

---0 0000

0000 0000

0000 0000

00-0 0000

---0 0000

0000 0000

0000 0000

--00 0000

0000 0000

0000 0000

0000 0000

xxxx xxxx

xxxx xxxx

0000 000x

1111 1111

1100 0000

N/A

---0 0000

0000 0000

0000 0000

uu-0 0000

---0 0000

0000 0000

0000 0000

--00 0000

0000 0000

0000 0000

0000 0000

uuuu uuuu

uuuu uuuu

0000 000u

1111 1111

1100 0000

N/A

---0 uuuu(1)

uuuu uuuu(1)

uuuu uuuu(1)

uu-u uuuu(1)

---u uuuu

uuuu uuuu

PC + 2(2)

--uu uuuu

uuuu uuuu

uuuu uuuu

uuuu uuuu

uuuu uuuu

uuuu uuuu

uuuu uuuu(3)

uuuu uuuu(3)

uuuu uuuu(3)

N/A

POSTINC0 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

POSTDEC0 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PREINC0

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PLUSW0

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

FSR0H

FSR0L

WREG

INDF1

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

---- xxxx

xxxx xxxx

xxxx xxxx

N/A

---- uuuu

uuuu uuuu

uuuu uuuu

N/A

---- uuuu

uuuu uuuu

uuuu uuuu

N/A

POSTINC1 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

POSTDEC1 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PREINC1

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PLUSW1

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

FSR1H

FSR1L

BSR

Legend:

Note 1:

2:

3:

4:

PIC18F6XJ1X PIC18F8XJ1X ---- xxxx

---- uuuu

---- uuuu

PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx

uuuu uuuu

uuuu uuuu

PIC18F6XJ1X PIC18F8XJ1X ---- 0000

---- 0000

---- uuuu

u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

See Table 4-1 for Reset value for specific condition.

Â© 2009 Microchip Technology Inc.

DS39778D-page 57

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