PIC18F67J11-IPT Datasheet, PDF (125/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
REGISTER 9-11: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
OSCFIP
bit 7
R/W-1
CM2IP
R/W-1
CM1IP
U-0
R/W-1
R/W-1
R/W-1
—
BCL1IP
LVDIP
TMR3IP
R/W-1
CCP2IP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
CM2IP: Comparator 2 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
C12IP: Comparator 1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4
Unimplemented: Read as ‘0’
bit 3
BCL1IP: Bus Collision Interrupt Priority bit (MSSP1 module)
1 = High priority
0 = Low priority
bit 2
LVDIP: Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
CCP2IP: ECCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
© 2009 Microchip Technology Inc.
DS39778D-page 125