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PIC18F67J11-IPT Datasheet, PDF (5/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology
Pin Diagrams (Continued)
80-Pin TQFP
PIC18F87J11 FAMILY
RH2/A18/PMD7(3)
RH3/A19/PMD6(3)
RE1/AD9/PMWR(3)/P2C
RE0/AD8/PMRD(3)/P2D
RG0/PMA8/ECCP3/P3A
RG1/PMA7/TX2/CK2
RG2/PMA6/RX2/DT2
RG3/PMCS1/CCP4/P3D
MCLR
RG4/PMCS2/CCP5/P1D
VSS
VDDCORE/VCAP
RF7/PMD0(3)/SS1
RF6/PMD1(3)/AN11/C1INA
RF5/PMD2(3)/AN10/ C1INB/CVREF
RF4/AN9/C2INA
RF3/AN8/C2INB
RF2/PMA5/AN7/C1OUT
RH7/PMWR(3)/AN15/P1B(2)
RH6/PMRD(3)/AN14/ P1C(2)/C1INC
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1
60
2
59
3
58
4
57
5
56
6
55
7
54
8
53
9
PIC18F8XJ11
52
10
11
PIC18F8XJ16
51
50
12
49
13
48
14
47
15
46
16
45
17
44
18
43
19
42
20
41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
RJ2/WRL
RJ3/WRH
RB0/INT0/FLT0
RB1/INT1/PMA4
RB2/INT2/PMA3
RB3/INT3/PMA2/ECCP2(1)/P2A(1)
RB4/KBI0/PMA1
RB5/KBI1/PMA0
RB6/KBI2/PGC
VSS
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VDD
RB7/KBI3/PGD
RC5/SDO1
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RJ7/UB
RJ6/LB
Note 1: The ECCP2/P2A pin placement depends on the CCP2MX Configuration bit and Processor mode settings.
2: P1B, P1C, P3B, and P3C pin placement depends on the ECCPMX Configuration bit setting.
3: PMP pin placement depends on the PMPMX Configuration bit setting.
© 2009 Microchip Technology Inc.
DS39778D-page 5