PIC18F67J11-IPT Datasheet, PDF (321/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
REGISTER 24-6: CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
U-1
—
bit 7
U-1
U-1
U-1
R/WO-1
R/WO-1
R/WO-1
R/WO-1
—
—
—
MSSPMSK PMPMX⁽¹⁾ ECCPMX⁽¹⁾ CCP2MX
bit 0
Legend:
R = Readable bit
-n = Value at POR
WO = Write-Once bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Maintain as ‘1’
MSSPMSK: MSSP Address Masking Mode Select bit
1 = 7-Bit Address Masking mode enabled
0 = 5-Bit Address Masking mode enable
PMPMX: PMP Pin Multiplex bit⁽¹⁾
1 = PMP data and control multiplexed to same pins as external memory bus (PORTD and PORTE)
0 = PMP data and control multiplexed to alternate pin assignments (PORTA, PORTF and PORTH)
ECCPMX: ECCPx MUX bit⁽¹⁾
1 = ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5;
ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3
0 = ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6;
ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4
CCP2MX: ECCP2 MUX bit
1 = ECCP2/P2A is multiplexed with RC1
0 = ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (all devices) or with RB3 in Extended
Microcontroller mode (80-pin devices only)
Note 1: Implemented on 80-pin devices only.
© 2009 Microchip Technology Inc.
DS39778D-page 321