PIC18F67J11-IPT Datasheet, PDF (324/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
REGISTER 24-9: WDTCON: WATCHDOG TIMER CONTROL REGISTER
R/W-0
R-x
U-0
R/W-0
U-0
U-0
REGSLP LVDSTAT
—
ADSHR
—
—
bit 7
U-0
U-0
—
SWDTEN⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
REGSLP: Voltage Regulator Low-Power Operation Enable bit
1 = On-chip regulator enters low-power operation when device enters Sleep mode
0 = On-chip regulator is active, even in Sleep mode
LVDSTAT: LVD Status bit
1 = VDDCORE > 2.45V
0 = VDDCORE < 2.45V
Unimplemented: Read as ‘0’
ADSHR: Shared Address SFR Select bit
For details of bit operation, see Register 5-3.
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit⁽¹⁾
1 = Watchdog Timer is on
0 = Watchdog Timer is off
Note 1: This bit has no effect if the Configuration bit, WDTEN, is enabled.
TABLE 24-3: SUMMARY OF WATCHDOG TIMER REGISTERS
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset Values
on Page:
RCON
IPEN
—
CM
RI
TO
PD
POR
BOR
58
WDTCON REGSLP LVDSTAT —
ADSHR
—
—
— SWDTEN
59
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
DS39778D-page 324
© 2009 Microchip Technology Inc.