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PIC18F67J11-IPT Datasheet, PDF (140/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology
PIC18F87J11 FAMILY
TABLE 10-10: PORTD FUNCTIONS (CONTINUED)
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RD6/AD6/
RD6
0
PMD6/SCK2/
1
SCL2
AD6(2)
x
x
PMD6(3)
x
O
DIG LATD<6> data output.
I
ST PORTD<6> data input.
O DIG-3 External memory interface, address/data bit 6 output.(1)
I
TTL External memory interface, data bit 6 input.(1)
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
SCK2
0
O
DIG SPI clock output (MSSP2 module); takes priority over port data.
1
I
ST SPI clock input (MSSP2 module).
SCL2
0
O
DIG I2C™ clock output (MSSP2 module); takes priority over port data.
1
I
ST I2C clock input (MSSP2 module); input type depends on module
setting.
RD7/AD7/
PMD7/SS2
RD7
0
1
AD7(2)
x
x
PMD7(3)
x
O
DIG LATD<7> data output.
I
ST PORTD<7> data input.
O
DIG External memory interface, address/data bit 7 output.(1)
I
TTL External memory interface, data bit 7 input.(1)
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
SS2
x
I
TTL Slave select input for MSSP2 module.
Legend:
Note 1:
2:
3:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PMP I/O.
Available on 80-pin devices only.
Default configuration for PMP (PMPMX Configuration bit = 1).
TABLE 10-11: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PORTD
RD7
RD6
RD5
RD4
LATD
LATD7 LATD6 LATD5 LATD4
TRISD
PORTG
TRISD7 TRISD6 TRISD5 TRISD4
RDPU
REPU RJPU(1)
RG4
Legend: Shaded cells are not used by PORTD.
Note 1: Unimplemented on 64-pin devices, read as ‘0’.
RD3
LATD3
TRISD3
RG3
RD2
LATD2
TRISD2
RG2
RD1
LATD1
TRISD1
RG1
Bit 0
Reset
Values
on Page:
RD0
61
LATD0
60
TRISD0
60
RG0
61
DS39778D-page 140
© 2009 Microchip Technology Inc.