PIC18F67J11-IPT Datasheet, PDF (139/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
TABLE 10-10: PORTD FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RD0/AD0/
PMD0
RD0
0
1
AD0⁽²⁾
x
x
PMD0⁽³⁾
x
O
DIG LATD<0> data output.
I
ST PORTD<0> data input.
O
DIG External memory interface, address/data bit 0 output.⁽¹⁾
I
TTL External memory interface, data bit 0 input.⁽¹⁾
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
RD1/AD1/
PMD1
RD1
0
1
AD1⁽²⁾
x
x
PMD1⁽³⁾
x
O
DIG LATD<1> data output.
I
ST PORTD<1> data input.
O
DIG External memory interface, address/data bit 1 output.⁽¹⁾
I
TTL External memory interface, data bit 1 input.⁽¹⁾
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
RD2/AD2/
PMD2
RD2
0
1
AD2⁽²⁾
x
x
PMD2⁽³⁾
x
O
DIG LATD<2> data output.
I
ST PORTD<2> data input.
O
DIG External memory interface, address/data bit 2 output.⁽¹⁾
I
TTL External memory interface, data bit 2 input.⁽¹⁾
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
RD3/AD3/
PMD3
RD3
0
1
AD3⁽²⁾
x
x
PMD3⁽³⁾
x
O
DIG LATD<3> data output.
I
ST PORTD<3> data input.
O
DIG External memory interface, address/data bit 3 output.⁽¹⁾
I
TTL External memory interface, data bit 3 input.⁽¹⁾
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
RD4/AD4/
RD4
0
PMD4/SDO2
1
AD4⁽²⁾
x
x
PMD4⁽³⁾
x
O
DIG LATD<4> data output.
I
ST PORTD<4> data input.
O
DIG External memory interface, address/data bit 4 output.⁽¹⁾
I
TTL External memory interface, data bit 4 input.⁽¹⁾
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
SDO2
0
O
DIG SPI data output (MSSP2 module); takes priority over port data.
RD5/AD5/
RD5
0
PMD5/SDI2/
1
SDA2
AD5⁽²⁾
x
x
PMD5⁽³⁾
x
O
DIG LATD<5> data output.
I
ST PORTD<5> data input.
O
DIG External memory interface, address/data bit 5 output.⁽¹⁾
I
TTL External memory interface, data bit 5 input.⁽¹⁾
O
DIG Parallel Master Port data out.
x
I
TTL Parallel Master Port data input.
SDI2
1
I
ST SPI data input (MSSP2 module).
SDA2
1
O
DIG I²C™ data output (MSSP2 module); takes priority over port data.
1
I
ST I²C data input (MSSP2 module); input type depends on module
setting.
Legend:
Note 1:
2:
3:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PMP I/O.
Available on 80-pin devices only.
Default configuration for PMP (PMPMX Configuration bit = 1).
© 2009 Microchip Technology Inc.
DS39778D-page 139