PIC18F67J11-IPT Datasheet, PDF (138/448 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J11 FAMILY
TABLE 10-9: SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PORTC
LATC
TRISC
RC7
LATC7
TRISC7
RC6
LATBC6
TRISC6
RC5
LATC5
TRISC5
RC4
LATCB4
TRISC4
RC3
LATC3
TRISC3
RC2
LATC2
TRISC2
RC1
LATC1
TRISC1
Bit 0
RC0
LATC0
TRISC0
Reset
Values
on Page:
61
60
60
10.5 PORTD, TRISD and
LATD Registers
PORTD is an 8-bit wide, bidirectional port. All pins on
PORTD are digital only and tolerate voltages up to
5.5V.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
Note: These pins are configured as digital inputs
on any device Reset.
On 80-pin devices, PORTD is multiplexed with the
system bus as part of the external memory interface.
I/O port and other functions are only available when the
interface is disabled by setting the EBDIS bit
(MEMCON<7>). When the interface is enabled,
PORTD is the low-order byte of the multiplexed
address/data bus (AD7:AD0). The TRISD bits are also
overridden.
PORTD is also multiplexed with the data functions of
the Parallel Master Port data. In this mode, Parallel
Master Port takes priority over the other digital I/O (but
not the external memory bus). This multiplexing is
available when PMPMX = 1. When the Parallel Master
Port is active, the input buffers are TTL. For more
information, refer to Section 11.0 “Parallel Master
Port”.
Each of the PORTD pins has a weak internal pull-up.
This is performed by clearing bit RDPU (PORTG<7>).
The weak pull-up is automatically turned off when the
port pin is configured as an output. The pull-ups are
disabled on all device Resets.
EXAMPLE 10-4: INITIALIZING PORTD
CLRF
CLRF
MOVLW
MOVWF
PORTD
LATD
0CFh
TRISD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method to clear
; output data latches
; Value used to initialize
; data direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
DS39778D-page 138
© 2009 Microchip Technology Inc.