C868_02 Datasheet, PDF (86/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
highside switch should be active while the T12 counter value is above the compare value
(compare state =’1’), then the lowside switch should be active while the counter value is
below (compare state =’0’). The compare state, which may lead to an active output
(respecting other modulation sources and the trap functionality) can be selected by the
CC6xPS bits.
T12
CC6xST
CC6xST
DTCx_o
CC6xST AND DTCx_o
CC6xST AND DTCx_o
CC6xPS
1 _{CC6x_T12_o}
0
COUT6xPS
1 _{COUT6x_T12_o}
0
Figure 4-21 PWM-signals with Dead-time Generation
In most cases, the switching behavior of the connected power switches is not
symmetrical concerning the times needed to switch on and to switch off. A general
problem arises if the time to switch on is smaller than the time to switch off the power
device. In this case, a short-circuit in the inverter bridge leg occurs, which may damage
the complete system. In order to solve this problem by HW, this capture/compare unit
contains a programmable dead-time counter, which delays the passive to active edge of
the switching signals (the active to passive edge is not delayed), see Figure 4-21.
The dead-time generation logic (see Figure 4-22) is built in a similar way for all three
channels of T12. Each change of the CC6xST bits triggers the corresponding dead-time
counter (6 bit down counter, clocked with T12clk). The trigger pulse (DTCx_rl) leads to
a reload of the dead-time counter with the value, which has been programmed in bit field
User’s Manual
4-42
V 0.4, 2002-01