C868_02 Datasheet, PDF (226/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
Power Saving Modes
8.3
Idle Mode
In the idle mode the oscillator of the C868 continues to run, but the CPU is gated off from
the clock signal. However, the interrupt system, the serial port, the A/D converter, the
capture/compare unit, and all timers with the exception of the watchdog timer are further
provided with the clock. The CPU status is preserved in its entirety: the stack pointer,
program counter, program status word, accumulator, and all other registers maintain
their data during idle mode.
The reduction of power consumption, which can be achieved by this feature depends on
the number of peripherals running. If all timers are stopped and the A/D converter, and
the serial interfaces are not running, the maximum power reduction can be achieved.
This state is also the test condition for the idle mode I_DDC.
Thus, the user has to take care which peripheral should continue to run and which has
to be stopped during idle mode. Also the state of all port pins – either the pins controlled
by their latches or controlled by their secondary functions – depends on the status of the
controller when entering idle mode.
Normally, the port pins hold the logical state they had at the time when the idle mode was
activated. If some pins are programmed to serve as alternate functions they still continue
to output during idle mode if the assigned function is on. This especially applies to the
serial interface in case it cannot finish reception or transmission during normal operation.
As in normal operation mode, the ports can be used as inputs during idle mode. Thus a
capture or reload operation can be triggered, the timers can be used to count external
events, and external interrupts will be detected.
The idle mode is a useful feature which makes it possible to "freeze" the processor's
status - either for a predefined time, or until an external event reverts the controller to
normal operation, as discussed below. The watchdog timer is the only peripheral which
is automatically stopped during idle mode.
The idle mode is entered by setting the flag bit IDLE (PCON.0).
There are two ways to terminate the idle mode:
The idle mode can be terminated by activating any enabled interrupt. The CPU operation
is resumed, the interrupt will be serviced and the next instruction to be executed after the
RETI instruction will be the one following the instruction that had set the bit IDLE.
The other way to terminate the idle mode, is a hardware reset.
User’s Manual
8-4
V 0.4, 2002-01