C868_02 Datasheet, PDF (69/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
4.6.4 Operating Mode Selection
The operating mode of timer/counter 2 is controlled by register T2CON. This register
serves two purposes:
– during initialization it provides access to a set of control bits
– during timer operation it provides access to a set of status flags.
The different modes of operation are:
– Auto-Reload Mode,
– Capture Mode, and
– Baudrate Generator Mode
4.6.5 Auto-Reload Mode
In the auto-reload mode, timer/counter 2 counts to an overflow value and then reloads
its registers contents with a 16-bit value start value for a fresh counting sequence. The
overflow condition is indicated by setting the bit TF2 in the T2CON register. This will then
generate an interrupt request to the core by an active high signal. The overflow flag TF2
must be cleared by software.
The auto-reload mode is further classified into two categories depending upon the DCEN
control bit.
4.6.5.1 Up/Down Count Disabled
If DCEN=0, the up-down count selection is disabled. The timer/counter, therefore,
functions as a pure up timer/counter only. The operational block diagram is shown in
Figure 4-6.
In this mode if EXEN2=0, the timer/counter starts to count up to a maximum of FFFF_H,
once TR2 is set. Upon overflow, bit TF2 is set and the timer register is reloaded with a
16-bit reload of the RC2L/H registers. A fresh count sequence is started and the timer/
counter counts up from this reload value as in the previous count sequence. This reload
value is chosen by software, prior to the occurrence of an overflow condition.
If EXEN2=1, the timer/counter counts up to a maximum to FFFF_H, once TR2 is set. A
16-bit reload of the timer registers from register RC2L/H is triggered either by an overflow
condition or by a negative edge at input pin T2EX. If an overflow caused the reload, the
overflow flag TF2 is set. If a 1-to-0 transition at pin T2EX caused a reload, bit EXF2 is
set. In either case, an interrupt is generated to the core and the timer/counter proceeds
to its next count sequence. The EXF2 flag, similar to the TF2, must be cleared by
software.
Note: In counter mode, if the reload via T2EX and the count clock T2 are detected
simultaneously the reload takes precedence over the count. The counter
increments its value with the following T2 count clock.
User’s Manual
4-25
V 0.4, 2002-01