C868_02 Datasheet, PDF (175/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
Reset and System Clock Operation
CMCON
Clock Control Register
[Reset value: 9F_H]
7
6
5
4
3
2
1
0
KDIV
rw
REL
rw
Field
REL
KDIV
Bits
[4..0]
[7..5]
Typ Description
rw Slowdown divider
REL is used to divide down the system clock during
slow down mode
rw K-divider
KDIV selects the PLL division factor according to
Table 5-2
User’s Manual
5-9
V 0.4, 2002-01