C868_02 Datasheet, PDF (216/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
Interrupt System
7.3
Interrupt Priority Level Structure
The 13 interrupt sources of the C868 are grouped according to the listing in Table 7-1.
Table 7-1 Interrupt Source Structure
Interrupt Associated Interrupts
Group
0
External interrupt A/D converter
0
interrupt
1
Timer 0 Overflow External interrupt
2
2
External interrupt External interrupt Capture/compare
1
3
interrupt node 0
3
Timer 1 overflow Capture/compare
interrupt node 1
4
Capture/compare Serial interrupt
interrupt node 2
5
Timer 2 overflow Capture/compare
interrupt node 3
Each group of interrupt sources can be programmed individually to one of two priority
levels by setting or clearing one bit in the special function register IP0. A low-priority
interrupt can be interrupted by a high-priority interrupt, but not by another interrupt of the
same or a lower priority. An interrupt of the highest priority level cannot be interrupted by
another interrupt source.
lf two or more requests of different priority levels are received simultaneously, the
request of the highest priority is serviced first. lf requests of the same priority level are
received simultaneously, an internal polling sequence determines which request is to be
serviced first. Thus, within each priority level there is a second priority structure
determined by the polling sequence. This is illustrated in Table 7-2.
User’s Manual
7-32
V 0.4, 2002-01