C868_02 Datasheet, PDF (165/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
4.11.1 A/D Converter Calibration
The C868 A/D converter includes hidden internal calibration mechanisms which assure
a safe functionality of the A/D converter according to the DC characteristics. The A/D
converter calibration is implemented in a way that a user program which executes A/D
conversions is not affected by its operation. Further, the user program has no control
over the calibration mechanism. The calibration itself executes two basic functions :
Offset calibration : correction of offset errors of comparator and the capacitor network
Linearity calibration : correction of the binary-weighted capacitor network
The A/D converter calibration operates in two phases. First phase is the calibration after
a reset operation and the second is the calibration at each A/D conversion. The
calibration phases are controlled by a state machine in the A/D converter. This state
machine executes the calibration phases and stores the calibration results dynamically
in a small calibration RAM.
After a reset operation the A/D calibration is automatically started. This reset calibration
phase, alternating offset and linearity calibration is executed. For achieving a proper
reset calibration, the f_ADC prescaler value must satisfy the condition f_{ADC max} 2 MHz.
If this condition is not met at a specific system frequency with the default prescaler value
after reset, the f_ADC prescaler must be adjusted immediately after reset by setting bits
ADCTC1 and ADCTC0 in SFR ADCON1 to a suitable value. It is also recommended to
have the proper voltages, as specified in the DC specifications, applied at the V_AREF and
V_AGND pins before the reset calibration has started.
After the reset calibration phase the A/D converter is calibrated according to its DC
characteristics. Nevertheless, during the reset calibration phase single or continuous A/
D can be executed. In this case it must be regarded that the reset calibration is
interrupted and continued after the end of the A/D conversion. Therefore, interrupting the
reset calibration phase by A/D conversions extends the total reset calibration time. If the
specified total unadjusted error (TUE) has to be valid for an A/D conversion, it is
recommended to start the first A/D conversions after reset when the reset calibration
phase is finished. Depending on the system frequency selected, the reset calibration
phase can be possibly shortened by setting ADCTC1 and ADCTC0 (prescaler value) to
its final value immediately after reset.
After the reset calibration, a second calibration mechanism is initiated. This calibration is
coupled to each A/D conversion. With this second calibration mechanism alternatively
offset and linearity calibration values, stored in the calibration RAM, are always checked
when an A/D conversion is executed and corrected if required.
User’s Manual
4-121
V 0.4, 2002-01