C868_02 Datasheet, PDF (109/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
T12DTCH
Timer T12 Dead-Time Control Register,High Byte
[Reset value: 00_H]
7
6
5
4
3
2
1
0
-
DTR
-
DTE
r
rh
r
rw
Field
DTE
DTR
-
Bits Typ Description
[2:0] rw Dead Time Enable Bits
Bits DTE0..DTE2 enable and disable the dead time
generation for each compare channel (0, 1, 2) of
timer T12.
0Dead time generation is disabled. The
corresponding outputs switch from the passive state
to the active state (according to the actual compare
status) without any delay.
1Dead time generation is enabled. The
corresponding outputs switch from the passive state
to the active state (according to the compare status)
with the delay programmed in bitfield DTM.
[6:4] rh Dead Time Run Indication Bits
Bits DTR0..DTR2 indicate the status of the dead
time generation for each compare channel (0, 1, 2)
of timer T12.
0The value of the corresponding dead time counter
channel is 0.
1The value of the corresponding dead time counter
channel is not 0.
7,3 r reserved;
returns ’0’ if read; should be written with ’0’;
Note: The dead time counters are clocked with the same frequency as T12.
This structure allows symmetrical dead time generation in center-aligned and in
edge-aligned PWM mode. A duty cycle of 50% leads to CC6x, COUT6x switched
on for: 0.5 * period - dead time.
Note: The dead-time counters are not reset by bit T12RES, but by bit DTRES.
User’s Manual
4-65
V 0.4, 2002-01