C868_02 Datasheet, PDF (229/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
Power Saving Modes
INT0
or
RXD
Power Down
Mode
(1)
Latch
Phase
(2)
min.
1s
On-chip Oscillator
Start-up Phase
(3)
typ. 10 ms
PLL
Locked
Phase
Execution of
interrupt at
007B_H
(4) ₍₅₎
max.
1 ms
RETI
Instruction
Figure 8-1 Wake-up from Power Down Mode Procedure
When the power down mode wake-up capability has been enabled (bit EWPD in SFR
PMCON0 set) prior to entering power down mode and bit WS in SFR PMCON0 is
cleared, the power down mode can be exit via INT0 while executing the following
procedure :
1. In power down mode pin INT0 must be held at high level.
2. Power down mode is left when INT0 goes low(latch phase). After this delay the on-
chip oscillator and the PLL are started, the state of pin INT0 is internally latched, and
INT0 can be set again to high level if required.
3. The on-chip oscillator takes about, typically, 10 ms to stabilize.
4. The PLL will be locked within 1 ms after the on-chip oscillator clock is detected for
stable nominal frequency. Subsequently, the microcontroller starts again with its
operation initiating the power down wake-up interrupt. The interrupt address of the first
instruction to be executed after wake-up is 007B_H. Instruction fetches during the
interrupt call are, however, discarded.
5. After the RETI instruction of the power down wake-up interrupt routine has been
executed, the instruction which follows the initiating power down mode instruction
sequence will be executed.
All interrupts of the C868 are disabled from phase 2 until the end of phase 5. Other
Interrupts can be first handled after the RETI instruction of the wake-up interrupt routine.
The procedure to exit the software power down mode via the RXD pin is identical to the
above procedure except that in this case pin RXD replaces pin INT0, and bit WS in SFR
PCON1 should be set prior to entering software power down mode.
User’s Manual
8-7
V 0.4, 2002-01