C868_02 Datasheet, PDF (145/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
Multiprocessor Communication
Modes 2 and 3 have a special provision for multiprocessor communications. In these
modes, 9 data bits are received. The 9th one goes into RB8. Then comes a stop bit. The
port can be programmed such that when the stop bit is received, the serial port interrupt
will be activated only if RB8 = 1. This feature is enabled by setting bit SM2 in SCON. A
way to use this feature in multiprocessor systems is as follows.
When the master processor wants to transmit a block of data to one of several slaves, it
first sends out an address byte which identifies the target slave. An address byte differs
from a data byte in that the 9th bit is 1 in an address byte and 0 in a data byte. With SM2
= 1, no slave will be interrupted by a data byte. An address byte, however, will interrupt
all slaves, so that each slave can examine the received byte and see if it is being
addressed. The addressed slave will clear its SM2 bit and prepare to receive the data
bytes that will be coming. The slaves that weren’t being addressed leave their SM2s set
and go on about their business, ignoring the incoming data bytes.
SM2 can be used in mode 1 to check the validity of the stop bit. In a mode 1 reception,
if SM2 = 1, the receive interrupt will not be activated unless a valid stop bit is received.
Serial Port Registers
The serial port control and status register is the special function register SCON. This
register contains not only the mode selection bits, but also the 9th data bit for transmit
and receive (TB8 and RB8), and the serial port interrupt bits (TI and RI).
SBUF is the receive and transmit buffer of serial interface. Writing to SBUF loads the
transmit register and initiates transmission. Reading out SBUF accesses a physically
separate receive register.
SBUF
Serial Data Buffer Register
[Reset value: 00_H]
7
6
5
4
3
2
1
0
SBUF
rw
Field
SBUF
Bits Typ Description
[7:0] rw Serial Interface Buffer Register
User’s Manual
4-101
V 0.4, 2002-01