C868_02 Datasheet, PDF (46/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
4.2.1 Register Overview
The following table lists the port SFR registers. They contain the value in the port latches.
Table 4-1 Memory Organization Register Overview
Register
Description
Address
P1
Port 1 SFR
90_H
P1DIR
Port 1 Direction
90_H
P3
Port 3 SFR
B0_H
P3DIR
Port 3 Direction
B0_H
P3ALT
Port 3 Alternate Function
B1_H
P1ALT
Port 1 Alternate Function
B4_H
P1 and P1DIR is mapped on the same address and depend on the RMAP (SYSCON0.4)
bit to select between the two registers. By default (bit = 0), P1 occupies the address. If
the bit is set to 1 then P1DIR occupy the address.
P3 and P3DIR is mapped on the same address and depend on the RMAP (SYSCON0.4)
bit to select between the two registers. By default (bit = 0), P3 occupies the address. If
the bit is set to 1 then P3DIR occupy the address.
Ports 1 and 3 also serves alternate functions as listed in the Table 4-2. To select
between the alternate function and normal I/O, registers P1ALT and P3ALT are used.
Each can be set to ’1’ for alternate functions, or reset to ’0’ for normal I/O.
Table 4-2 Ports 1 and 3 Alternate Functions
Port
Pin
Alt-Function
Description
1
P1.0
TxD
Transmit data of serial interface
1
P1.1
EXF2
Timer 2 overflow flag
1
P1.3
INT3
Interrupt 3
1
P1.4
RxD
Receive data of serial interface
3
P3.0
COUT63
16 bit compare channel output
3
P3.1
CTRAP
CCU trap input
3
P3.2
COUT62
Output of CCU6 channel 2
3
P3.3
CC62
Input/output of CCU6 channel 2
3
P3.4
COUT61
Output of CCU6 channel 1
3
P3.5
CC61
Input/output of CCU6 channel 1
3
P3.6
COUT60
Output of CCU6 channel 0
3
P3.7
CC60
Input/output of CCU6 channel 0
User’s Manual
4-2
V 0.4, 2002-01