C868_02 Datasheet, PDF (133/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
MCMOUTSH
Multi-Channel Mode Output Shadow Register ,High Byte
7
6
5
4
3
2
STRHP
-
w
r
CURHS
rw
[Reset value: 00_H]
1
0
EXPHS
rw
Field
EXPHS
CURHS
STRHP
-
Bits Type Description
[2:0] rw Expected Hall Pattern Shadow
Bitfield EXPHS is the shadow bitfield for bitfield
EXPH. The bitfield is transferred to bitfield EXPH if
an edge on the hall input pins CCPOSx (x=0, 1, 2) is
detected.
[5:3] rw Current Hall Pattern Shadow
Bitfield CURHS is the shadow bitfield for bitfield
CURH. The bitfield is transferred to bitfield CURH if
an edge on the hall input pins CCPOSx (x=0, 1, 2) is
detected.
7
w Shadow Transfer Request for the Hall Pattern
Setting this bits during a write action leads to an
immediate update of bitfields CURH and EXPH by
the value written to bitfields CURHS and EXPH. This
functionality permits an update triggered by SW.
When read, this bit always delivers ’0’.
0 The bitfields CURH and EXPH are updated
according to the defined HW action. The write
access to bitfields CURHS and EXPH doesn’t
modify the bitfields CURH and EXPH.
1 The bitfields CURH and EXPH are updated by
the value written to the bitfields CURHS and
EXPHS.
6
r
reserved;
returns ’0’ if read; should be written with ’0’;
User’s Manual
4-89
V 0.4, 2002-01