C868_02 Datasheet, PDF (28/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

Field
BSLEN
SWC
ESWC
-
C868
Memory Organization
Bits
2
Typ Description
rw Bootstrap Mode Enable
BSLEN = 1 : Bootstrap mode
BSLEN = 0 : Normal mode (default)
This bit is initialised to the reverse of the value at external
pin ALE/BSL latched at the rising edge of RESET. This bit
can be set/cleared by software to change between the
modes. The modification of this bit by sofware must be
completed by the special software unlock sequence in
order to effect the mode change. Otherwise, this bit
automatically reverts to its previous value with the third EOI
(end of instruction) after this bit is modified. This is to
prevent any incorrect status read.
6
w Switch Mode
The SWC bit must be set as the second instruction in a
special software unlock sequence directly after having set
bit ESWC. The new chipmode becomes active after the
second EOI (end of instruction) after this event and the
SWC bit is also cleared simultaneously.
SWC is a write only bit. Reading SWC returns a ’0’.
7
w Enable Switch Mode
The ESWC bit must be set during the first instruction in the
special software unlock sequence. The bit ESWC will be
cleared by hardware with the third EOI (end of instruction)
after this event.
ESWC is a write only bit. Reading ESWC returns a ’0’.
[7:2] r
reserved;
returns ’0’ if read; should be written with ’0’;
User’s Manual
3-4
V 0.4, 2002-01