C868_02 Datasheet, PDF (141/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
On-Chip Peripheral Components
Table 4-4
Description of the Double-Register Capture modes.
Description
Double-Register Capture modes
0100The contents of T12 is stored in CC6nR after a rising edge and in CC6nSR after
a falling edge on the input pin CC6n.
0101The value stored in CC6nSR is copied to CC6nR after a rising edge on the input
pin CC6n. The actual timer value of T12 is simultaneously stored in the shadow register
CC6nSR. This feature is useful for time measurements between consecutive rising
edges on pins CC6n. COUT6n is IO.
0110The value stored in CC6nSR is copied to CC6nR after a falling edge on the input
pin CC6n. The actual timer value of T12 is simultaneously stored in the shadow register
CC6nSR. This feature is useful for time measurements between consecutive falling
edges on pins CC6n. COUT6n is IO.
0111The value stored in CC6nSR is copied to CC6nR after any edge on the input pin
CC6n. The actual timer value of T12 is simultaneously stored in the shadow register
CC6nSR. This feature is useful for time measurements between consecutive edges on
pins CC6n. COUT6n is IO.
Table 4-5
Description of the Combined-T12 modes.
Description
Combined-T12 modes
1000Hall Sensor mode:
Capture mode for channel 0, compare mode for channels 1 and 2. The contents of T12
is captured into CC60 at a valid hall event (which is a reference to the actual speed).
CC61 can be used for a phase delay function between hall event and output switching.
CC62 can act as a time-out trigger if the expected hall event comes too late. The value
’1000’ has to be programmed to MSEL0, MSEL1 and MSEL2 if the hall signals are
used. In this mode, the contents of timer T12 is captured in CC60 and T12 is reset after
the detection of a valid hall event. In order to avoid noise effects, the dead-time counter
channel 0 is started after an edge has been detected at the hall inputs. When reaching
the value of ’000001’, the hall inputs are sampled and the pattern comparison is done.
1001Hysteresis-like control mode with dead time generation:
The negative edge of the CCPOSx input signal is used to reset bit CC6nST. As a result,
the output signals can be switched to passive state immediately and switch back to
active state (with dead time) if the CCPOSx is high and the bit CC6nST is set by a
compare event.
User’s Manual
4-97
V 0.4, 2002-01