C868_02 Datasheet, PDF (215/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
Interrupt System
7.2.4 Interrupt Priority Registers
The lower six bits of these two registers are used to define the interrupt priority level of
the interrupt groups as they are defined in Table 7-2 in the next section.
IP0
Interrupt Priority Register 0
[Reset value: XX000000_B]
BF_H
BE_H
BD_H
BC_H
BB_H
BA_H
B9_H
B8_H
-
-
IP0
r
r
rw
Field
IP0x
x=0..5
-
Bits
[5..0]
[7:6]
Typ Description
rw Interrupt group priority level bits
0 Interrupt group x is set to priority level 0 (lowest)
1 Interrupt group x is set to priority level 1 (highest)
r reserved;
returns ’0’ if read; should be written with ’0’;
User’s Manual
7-31
V 0.4, 2002-01