C868_02 Datasheet, PDF (162/244 Pages) Infineon Technologies AG – 8 - Bit CMOS Microcontroller

C868
4.10.3 Operation of the ADC
On-Chip Peripheral Components
The ADC supports two conversion modes - single and continuous conversions. For
each mode, there are two ways in which conversion can be started - by software.
Writing a ’1’ to bit field ADST starts conversion on the channel that is specified by ADCH.
In single conversion mode, bit field ADM is cleared to ’0’. This is the default mode
selected after hardware reset. When a conversion is started, the channel specified is
sampled. The busy flag ADBSY is set and ADST is cleared. When the conversion is
completed, the interrupt request is asserted and the 8-bit result is transferred to the result
register ADDATH.
In continuous conversion mode, bit field ADM is set to ’1’. In this mode, the ADC
repeatedly converts the channel specified by ADCH. Bit ADST is cleared at the
beginning of the first conversion. The busy flag ADBSY is asserted until the last
conversion is completed. At the end of each conversion, the interrupt request will be
asserted. To stop conversion, ADM has to be reset by software. If the channel number
ADCH is changed while continuous conversion is in progress, the new channel specified
will be sampled in the conversions that follow.
A new request to start conversion will be allowed only after the completion of any
conversion that is in progress.
4.10.4 Module Powerdown
The ADC is disabled when the chip goes into the powerdown mode as describe in . Or
it can be individually disabled by setting ADCDIS in register PMCON1. This helps to
reduce current consumption in the normal, slow down and idle modes of operation if the
ADC is not utilized. Bit ADCST in register PMCON2 reflects the powerdown status of
ADC. If the ADC is disabled during an A/D conversion, ADC will be disabled
(ADCST=’1’) only after the conversion is completed.
Note : Generally, before entering the power-down mode, an A/D conversion in
progress must be stopped. If a single A/D conversion is running, it must be terminated
by polling the ADBSY bit or waiting for the A/D conversion interrupt. In continuous
conversion mode, ADM must be cleared and the last A/D conversion must be terminated
before entering the power-down mode.
User’s Manual
4-118
V 0.4, 2002-01