HYB18T512400AC5 Datasheet, PDF (83/96 Pages) Infineon Technologies AG – 512-Mbit Double-Data-Rate-Two SDRAM

HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Reference Loads, Setup & Hold Timing Definition and Slew Rate Derating
8
Reference Loads, Setup & Hold Timing Definition and Slew Rate
Derating
8.1
Reference Load for Timing Measurements
The figure represents the timing reference load used in
defining the relevant timing parameters of the device. It
is not intended to either a precise representation of the
typical system environment nor a depiction of the actual
load presented by a production tester. System
designers should use IBIS or other simulation tools to
correlate the timing reference load to a system
environment. Manufacturers correlate to their
production test conditions, generally a coaxial
transmission line terminated at the tester electronics.
This reference load is also used for output slew rate
characterisation. The output timing reference voltage
level for single ended signals is the crosspoint with V_TT.
The output timing reference voltage level for differential
signals is the crosspoint of the true (e.g. DQS) and the
complement (e.g. DQS) signal.
CK, CK
VDDQ
DUT
DQ
DQS
DQS
RDQS
RDQS
25 Ohm
V_TT = V_DDQ / 2
Timing Reference Points
Figure 67 Reference Load for Timing Measurements
8.2
Slewrate Measurements
8.2.1 Output Slewrate
With the reference load for timing measurements
output slew rate for falling and rising edges is measured
between V_TT – 250 mV and V_TT + 250 mV for single
ended signals.
For differential signals (e.g. DQS / DQS) output slew
rate is measured between DQS - DQS = 500 mV and
DQS – DQS = + 500 mV. Output slew rate is verified by
design and characterisiation, but not subject to
production test.
8.2.2 Input Slewrate - Differential signals
Input slewrate for differential signals (CK / CK, DQS /
DQS, RDQS / RDQS) for rising edges are measured
from f.e. CK - CK = –250 mV to CK – CK = +500 mV
and from CK – CK = +250 mV to CK – CK = –500mV
for falling edges.
8.2.3 Input Slewrate - Single ended signals
Input slew rate for single ended signals (other than t_IS,
t_IH, t_DS and t_DH) are measured from dc-level to ac-level:
V_REF –125 mV to V_REF + 250 mV for rising edges and
from V_REF + 125 mV to V_REF – 250 mV for falling edges.
For slew rate definition of the input and data setup and
hold parameters see Chapter 8.3 of this datasheet.
Data Sheet
83
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P