HYB18T512400AC5 Datasheet, PDF (48/96 Pages) Infineon Technologies AG – 512-Mbit Double-Data-Rate-Two SDRAM

HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Functional Description
2.7
Precharge Command
The Precharge Command is used to precharge or close
a bank that has been activated. The Precharge
Command is triggered when CS, RAS and WE are low
and CAS is high at the rising edge of the clock. The Pre-
charge Command can be used to precharge each bank
independently or all banks simultaneously. Three
address bits A10, BA0 and BA1 are used to define
which bank to precharge when the command is issued.
Table 13
A10
LOW
LOW
LOW
LOW
HIGH
Bank Selection for Precharge by Address Bits
BA0
BA1
LOW
LOW
LOW
HIGH
HIGH
LOW
HIGH
HIGH
Don’t Care
Don’t Care
Precharge Bank(s)
Bank 0 only
Bank 1 only
Bank 2 only
Bank 3 only
all banks
Note: The bank address assignment is the same for activating and precharging a specific bank.
2.7.1 Read Operation Followed by a Precharge
The following rules apply as long as the t_RTP timing
parameter - Internal Read to Precharge Command
delay time - is less or equal two clocks, which is the
case for operating frequencies less or equal 266 Mhz
(DDR2 400 and 533 speed sorts):
Minimum Read to Precharge command spacing to the
same bank = AL + BL/2 clocks. For the earliest possible
precharge, the Precharge command may be issued on
the rising edge which is “Additive Latency (AL) + BL/2
clocks” after a Read Command, as long as the
minimum t_RAS timing is satisfied.
A new bank active command may be issued to the
same bank if the following two conditions are satisfied
simultaneously:
1. The RAS precharge time (t_RP) has been satisfied
from the clock at which the precharge begins.
2. The RAS cycle time (t_{RC, min}) from the previous bank
activation has been satisfied.
For operating frequencies higher than 266 MHz, t_RTP
becomes > 2 clocks and one additional clock cycle has
to be added for the minimum Read to Precharge
command spacing, which now becomes AL + BL/2 + 1
clocks.
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK, CK
CMD
DQS,
DQS
DQ
Post CAS
READ A
AL = 1
NOP
NOP
AL + BL/2 clks
CL = 3
RL = 4
P re c h a rg e
> = tR A S
> = tR C
>=tR TP
NOP
tR P
NOP
Bank A
A ctivate
Dout A0 Dout A1 Dout A2 Dout A3
CL = 3
NOP
Figure 39 Read Operation Followed by Precharge Example 1:
RL = 4 (AL = 1, CL = 3), BL = 4, t_RTP ≤ 2 clocks
NOP
BR-P413
Data Sheet
48
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P