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HYB18T512400AC5 Datasheet, PDF (78/96 Pages) Infineon Technologies AG – 512-Mbit Double-Data-Rate-Two SDRAM
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HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
IDD Specifications and Conditions
Table 36 IDD Measurement Conditions
Parameter
Symbol Notes
1)2)3)4)5)6)
Self-Refresh Current
IDD6
CKE ≤ 0.2 V; external clock off, CK and CK at 0 V; Other control and address inputs are
FLOATING, Data bus inputs are FLOATING. RESET = Low. IDD6 current values are
guaranteed up to TCASE of 85 °C max.
All Bank Interleave Read Current
IDD7
All banks are being interleaved at minimum tRC without violating tRRD using a burst length of
4. Control and address bus inputs are STABLE during DESELECTS. Iout = 0 mA.
1) VDDQ = 1.8 V ± 0.1 V; VDD = 1.8 V ± 0.1 V
2) IDD specifications are tested after the device is properly initialized.
3) IDD parameter are specified with ODT disabled.
4) Data Bus consists of DQ, DM, DQS, DQS, RDQS, RDQS, LDQS, LDQS, UDQS and UDQS.
5) Definitions for IDD: LOW is defined as VIN ≤ VIL(ac)max; HIGH is defined as VIN ≥ VIH(ac)min; STABLE is defined as inputs are
stable at a HIGH or LOW level; FLOATING is defined as inputs are VREF = VDDQ / 2; SWITCHING is defined as: Inputs are
changing between HIGH and LOW every other clock (once per two clocks) for address and control signals, and inputs
changing between HIGH and LOW every other clock (once per clock) for DQ signals not including mask or strobes.
6) Timing parameter minimum and maximum values for IDD current measurements are defined in Table 38.
Table 37 IDD Specification
Product Type Speed Code –3.7
Speed Grade
DDR2 – 533
Symbol
Max.
IDD0
65
80
IDD1
75
90
IDD2P
4
IDD2N
40
IDD2Q
30
IDD3P
16
5
IDD3N
40
IDD4R
90
100
IDD4W
95
110
IDD5B
IDD5D
IDD6
130
6
4
2
IDD7
140
220
1) IDD6: 0 ≤ TCASE ≤ 85 oC
–5
DDR2 – 400
Max.
55
70
60
75
4
32
25
13
5
35
70
85
75
90
120
6
4
2
130
210
Unit Notes
mA
×4/×8
mA
×16
mA
×4/×8
mA
×16
mA
×16/×4/×8
mA
×16/×4/×8
mA
×16/×4/×8
mA
×16/×4/×8 MRS(12)=0
mA
×16/×4/×8 MRS(12)=1
mA
×16/×4/×8
mA
×4/×8
mA
×16
mA
×4/×8
mA
×16
mA
×16/×4/×8
mA
×16/×4/×8
mA
1), standard products
mA
1), low power products
mA
×4/×8
mA
×16
Data Sheet
78
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
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