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HYB18T512400AC5 Datasheet, PDF (67/96 Pages) Infineon Technologies AG – 512-Mbit Double-Data-Rate-Two SDRAM
4
Operating Conditions
HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Operating Conditions
Table 19 Absolute Maximum Ratings
Symbol
VDD
VDDQ
VDDL
VIN, VOUT
TSTG
Parameter
Voltage on VDD pin relative to VSS
Voltage on VDDQ pin relative to VSS
Voltage on VDDL pin relative to VSS
Voltage on any pin relative to VSS
Storage Temperature
Rating
-1.0 to +2.3
-0.5 to +2.3
-0.5 to +2.3
-0.5 to +2.3
-55 to +100
Units
V
V
V
V
°C
Notes
1)
1)
1)
1)
1)
1) Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
Table 20 DRAM Component Operating Temperature Range
Symbol
TOPER
Parameter
Operating Temperature
Rating
0 to 95
Units
oC
Notes
1)2)3)4)
1) Operating Temperature is the case surface temperature on the center / top side of the DRAM. For measurement conditions,
please refer to the JEDEC document JESD51-2.
2) The operating temperature range are the temperatures where all DRAM specification will be supported. During operation,
the DRAM case temperature must be maintained between 0 - 95 oC under all other specification parameters.
3) Above 85 oC case temperature the Auto-Refresh command interval has to be reduced to tREFI = 3.9 µs.
4) Self-Refresh period is hard-coded in the chip and therefore it is imperative that the system ensures the DRAM is below
85oC case temperature before initiating self-refresh operation.
Data Sheet
67
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P