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| HYB18T512400AC5 Datasheet, PDF (68/96 Pages) Infineon Technologies AG – 512-Mbit Double-Data-Rate-Two SDRAM | |||
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HYB18T512[400/800/160]A[C/F]â[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
AC & DC Operating Conditions
5
AC & DC Operating Conditions
5.1
DC Operating Conditions
Table 21 Recommended DC Operating Conditions (SSTL_18)
Symbol
Parameter
Rating
Units Notes
Min.
Typ.
Max.
VDD
VDDDL
VDDQ
VREF
VTT
Supply Voltage
1.7
1.8
1.9
V
1)
Supply Voltage for DLL
1.7
1.8
1.9
V
1)
Supply Voltage for Output 1.7
1.8
1.9
V
1)
Input Reference Voltage
0.49 Ã VDDQ 0.5 Ã VDDQ
0.51 Ã VDDQ
V
2)3)
Termination Voltage
VREF â 0.04 VREF
VREF + 0.04
V
4)
1) VDDQ tracks with VDD, VDDDL tracks with VDD. AC parameters are measured with VDD, VDDQ and VDDDL tied together.
2) The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically the value of VREF is
expected to be about 0.5 Ã VDDQ of the transmitting device and VREF is expected to track variations in VDDQ.
3) Peak to peak ac noise on VREF may not exceed ± 2% VREF (dc)
4) VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal
to VREF, and must track variations in die dc level of VREF.
Table 22 ODT DC Electrical Characteristics
Parameter / Condition
Termination resistor impedance value for
EMRS(1)(A6,A2)= 0,1
Termination resistor impedance value for
EMRS(1)(A6,A2)=1,0
Deviation of VM with respect to VDDQ / 2
Symbol
Rtt1(eff)
Rtt2(eff)
delta VM
Min.
60
Nom. Max.
75
90
120 150 180
â6.00 â
+ 6.00
Units Notes
â¦
1)
â¦
1)
%
2)
1) Measurement Definition for Rtt(eff): Apply VIH(ac) and VIL(ac) to test pin separately, then measure current I(VIHac) and I(VILac)
respectively. Rtt(eff) = V( IH(ac) â VIL(ac)) /(I(VIHac) â I(VILac)).
2) Measurement Definition for VM: Measure voltage (VM) at test pin (midpoint) with no load: delta VM =((2 x VM / VDDQ) â 1) x
100%
Table 23 Input and Output Leakage Currents
Symbol Parameter / Condition
IIL
Input Leakage Current; any input 0 V < VIN < VDD
IOL
Output Leakage Current; 0 V < VOUT < VDDQ
1) all other pins not under test = 0 V
2) DQâs, DQS, DQS and ODT are disabled
Min.
â2
â5
Max.
+2
+5
Units
µA
µA
Notes
1)
2)
Data Sheet
68
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P
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