HYB18T512400AC5 Datasheet, PDF (46/96 Pages) Infineon Technologies AG – 512-Mbit Double-Data-Rate-Two SDRAM

HYB18T512[400/800/160]A[C/F]–[3.7/5]
512-Mbit Double-Data-Rate-Two SDRAM
Functional Description
T0
T1
T2
T3
T4
T5
CK, CK
CM D _{W RITE A}
NOP
NOP
NOP
NOP
DQS,
DQS
<= tDQSS
WL = RL-1 = 2
DQ
DIN A0 DIN A1 DIN A2 DIN A3
NOP
tW R
T6
T7
T9
NOP
P re c h a rg e
Bank A
A c tiv a te
tR P
DM
DM
Figure 36 Write Operation with Data Mask Example: RL = 3 (AL = 0, CL = 3), WL = 2, t_WR = 3, BL = 4
2.6.6 Burst Interruption
Interruption of a read or write burst is prohibited for
burst length of 4 and only allowed for burst length of 8
under the following conditions:
1. A Read Burst of 8 can only be interrupted by
another Read command. Read burst interruption by
a Write or Precharge Command is prohibited.
2. A Write Burst of 8 can only be interrupted by
another Write command. Write burst interruption by
a Read or Precharge Command is prohibited.
3. Read burst interrupt must occur exactly two clocks
after the previous Read command. Any other Read
burst interrupt timings are prohibited.
4. Write burst interrupt must occur exactly two clocks
after the previous Write command. Any other Read
burst interrupt timings are prohibited.
5. Read or Write burst interruption is allowed to any
bank inside the DDR2 SDRAM.
6. Read or Write burst with Auto-Precharge enabled is
not allowed to be interrupted.
7. Read burst interruption is allowed by a Read with
Auto-Precharge command.
8. Write burst interruption is allowed by a Write with
Auto-Precharge command.
9. All command timings are referenced to burst length
set in the mode register. They are not referenced to
the actual burst. For example, Minimum Read to
Precharge timing is AL + BL/2 where BL is the burst
length set in the mode register and not the actual
burst (which is shorter because of interrupt).
Minimum Write to Precharge timing is WL + BL/ 2 +
t_WR, where t_WR starts with the rising clock after the
un-interrupted burst end and not form the end of the
actual burst end.
Data Sheet
46
Rev. 1.13, 2004-05
09112003-SDM9-IQ3P