ZAMC4100 Datasheet, PDF (99/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
3.14. SBC Registers
All SBC registers are organized as one register file that is read/write accessible via the SPI. The SBC register file
organization is shown in Figure 3.28.
Figure 3.28 SBC Register File Organization
0x00
SBC Register Block
Global system control and
status registers
Control and status
registers for drivers
Control and status
registers for ADC
0x1B
0x1C
0x1F
LIN PHY registers
PWM control registers
Analog trim registers
AUTHSIG
The SBC register address space is 5-bits and is divided into two partitions: application registers and analog trim
registers. The application registers are READ/WRITE accessible and contain system and periphery control
registers.
The analog trim registers are WRITE-protected and can only be authorized by writing the correct code in
AUTHSIG (see section 3.14.2).
© 2016 Integrated Device Technology, Inc.
99
January 26, 2016