ZAMC4100 Datasheet, PDF (31/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
2.8. SPI Bus
The Serial Peripheral Interface (SPI) bus is used as a primary communication bus between the MCU and SBC
peripherals, including the drivers. The SPI mastering is done by the MCU which configures and controls the SBC
peripherals (output drivers, ADC, LIN, etc.). The SBC SPI slave supports byte-wise frame transfer with 8 data bits
per frame. In order to secure the communication, the SBC SPI supports frame length validation.
2.9. Diagnostic Functionalities
ZAMC4100 has a number of built-in protection and diagnostic features that enable the MCU to perform system
self-checks and to detect abnormal functionality. The main diagnostic functions supported by the ZAMC4100 are
as follows:
• Open/short detection for each driver output
• System supply monitoring and under/over-voltage detection
• Open/short detection at ADC inputs
• ADC internal circuitry check
• LIN over-current and dominant time-out detection
• SBC-to-MCU SPI connectivity check
2.10. Microcontroller ARM® Cortex™ M0
The microcontroller unit (MCU) of the ZAMC4100 features a 32-bit ARM® Cortex™-M0 processor core with
memory resources:
• 32 Kbytes program FLASH memory featuring
- Minimum 10,000 erase/write cycles
- 10 years data retention at 85°C
• 2 Kbytes SRAM
The MCU peripherals include the following:
• 8 configurable GPIO
• SW-LIN controller
• 32-bit timer module
• Master SPI
• Interrupt controller
© 2016 Integrated Device Technology, Inc.
31
January 26, 2016