ZAMC4100 Datasheet, PDF (137/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 4.34 Register [0x4000_0808] FC_CMD_SIZE
FC_CMD_SIZE
ADD:0x4000_0808
Bit
3:0
Name
COMMAND
Ext.
Access
R/W
Int.
Access
R
Reset
Value
0
Description
Command to be executed by flash controller
Valid commands:
0HEX: ERASE_MAIN_CMD
2HEX: ERASE_BOOT_PROG_CMD
3HEX: ERASE_PROG_CMD
4HEX: ERASE_MAINPAGE_CMD
6HEX: ERASE_KEY_CMD
8HEX: UNLOCK_CMD
9HEX: GETENV_CMD
AHEX: WRITE_CMD
CHEX: SET_KEY_CMD
DHEX: SET_BOUNDARY_CMD
EHEX: LOCK_PERM_CMD
FHEX: LOCK_KEY_CMD
7:4
---
R
---
0
Unused; always read as 0.
12:8
WRSIZE
R/W
R
0
Number of words to be written to FLASH; 0 is interpreted as 32.
Note: Writing is always performed within a row. 1 row contains
32 words. While the RAM address is always incremented, the
FLASH address wraps at the row boundary to the beginning of
the row. It is in the responsibility of the user to ensure this.
31 : 13
---
R
---
0
Unused; always read as 0.
Table 4.35 Register [0x4000_0810] FC_IRQ_EN
FC_IRQ_EN
ADD:0x4000_0810
Bit
Name
Ext.
Int. Reset
Access Access Value
0
ENIRQ0
R/W
R
0
1
ENIRQ1
R/W
R
0
2
ENIRQ2
R/W
R
0
3
ENIRQ3
R/W
R
0
4
ENIRQ4
R/W
R
0
5
ENIRQ5
R/W
R
0
Description
When set to 1, the status signal CMDRDY in the
FC_STAT_CORE register is allowed to drive the interrupt
line. See Table 4.36 for the related status signals for bits [3:0]
this register.
When set to 1, the status signal INVALIDCMD is allowed to
drive the interrupt line.
When set to 1, the status signal INVALIDAREA is allowed to
drive the interrupt line.
When set to 1, the status signal UNLOCKFAIL is allowed to
drive the interrupt line.
When set to 1, the status signal DATAALL1 in the
FC_STAT_DATA register is allowed to drive the interrupt line.
See Table 4.38 for the related status signals for bits [6:4] this
register.
When set to 1, the status signal DATA1ERR is allowed to
© 2016 Integrated Device Technology, Inc.
137
January 26, 2016