ZAMC4100 Datasheet, PDF (97/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
LIN Short Protection
If there is a valid LIN short event, after the debounce time configured in the LINCTRL register (Table 3.46), the
LIN short interrupt is generated, and the LIN transmitter is disabled. This interrupt is indicated in the LINSHIF flag
bit in the LINSTAT register.
The ZAMC4100 detects a LIN short event if it is transmitting frames to a master device and the following
conditions are both met concurrently:
1) The current through the output stage of the LIN transmitter exceeds the value specified by the parameter
IOC_LIN (see Table 1.7).
2) The MCU transmits the dominant state, but the LIN bus remains in the recessive state.
LIN Dominant Time-Out Protection
If the dominant state at the LIN transmitter’s output continues more than 11ms, the logic detects this as a
dominant time-out event and consequently disables the LIN transmitter. The dominant time-out detection
generates an interrupt that is captured in the LINDTOIF flag of register LINSTAT. When LINDTOIF = HIGH, the
LIN transmitter is automatically powered-down. In this way, the dominant state caused by the ZAMC4100 is
isolated; i.e., the LIN bus is released and the other devices can continue to communicate.
Important Notes:
1. ZAMC4100 detects a LIN dominant time-out ONLY if it is caused by the device itself; i.e., due to an
internal error in the ZAMC4100 LIN transmitter path. If the LIN bus is forced into dominant state externally
(for more than 11ms), this is not a valid dominant time-out for the ZAMC4100 because it is not caused by
its transmitter stage. This prevents detection of a dominant time-out that is caused by another device on
the LIN bus, i.e. not by the ZAMC4100.
2. For robustness, the ZAMC4100 dominant time-out detection is implemented using both oscillators (OSCL
and OSCH), which ensures that this type of failure event will be detected even if one of the oscillators has
stopped.
3. The LIN dominant time-out detection feature is permanently enabled and cannot be disabled by software.
Table 3.46 LINCTRL Registers Bit Mapping
Name
Bit No
LINCTRL
7
6
5
4
3
2
1
0
Bit name
Reset
U
U
U
U
0
Access
U
U
U
U R/W
Address
0x17
R/W = Read/Write bit U = Unimplemented, read as ‘0’
0
R/W
0
R/W
0
R/W
© 2016 Integrated Device Technology, Inc.
97
January 26, 2016