ZAMC4100 Datasheet, PDF (75/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 3.9, and Table 3.1).
To cover all possible failure scenarios, the ZAMC4100 features different resources for detecting short failures on
the module level and on the IC level. Failures on the IC level are detected using internal diagnostic current
sources and over-current protection, while detecting failures on the module level also requires the dedicated ADC
channel for direct measuring of the EC_M pin voltage (see Table 3.36). Because the EC_M pin is used for
sensing the potential at the mirror terminal, it gives precise information for the overall status and current operating
condition of the ECM functionality. Any failure on the IC or module level will result in an unexpected or inaccurate
response at the EC_M potential with respect to the configuration in the ECMCTRL register (see section 3.11.2).
The ADC ECM voltage channel together with the “open/short diagnostic check” (see 3.11.3) provides all the
necessary information for the MCU firmware to distinguish between different types of ECM short failures.
3.11.2. ECM Control Register
Table 3.27 ECMCTRL Register Bits Mapping
Name
ECMCTRL
Bit No
7
6
5
4
3
2
1
0
Bit name
Reset
0
Access
R/W
Address
R/W = Read/Write bit
0
R/W
0
R/W
0
0
R/W R/W
0x09
0
R/W
0
R/W
0
R/W
Table 3.28 ECMCTRL Register Bits Description
Bit Description
ECMEN: ^{1) 2) 3)} Electrochromatic mirror driver enable bit.
7 1 = ECM driver is enabled.
0 = ECM driver is disabled.
DSCEN: ^{1) 2)} Electrochromatic mirror discharge enable bit.
6 1 = ECM driver low-side MOSFET is ON; EC mirror discharge enabled.
0 = ECM driver low-side MOSFET is OFF; EC mirror discharge disabled.
ECMDAC[5:0]: ^{1) 2)} Electrochromatic control DAC bits.
5:0 111111 = ECM driver provides maximum output voltage (see Table 1.9).
000000 = ECM driver provides minimum output voltage (see Table 1.9).
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January 26, 2016