ZAMC4100 Datasheet, PDF (98/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 3.47 LINCTRL Registers Bits Description
Bit Description
LINWUMD: LIN wake-up detection mode (see Figure 3.27).
3
1 = LIN wake-up is detected if there is a falling edge at the LIN pin followed by a dominant state longer
than t_LINWU and a rising edge at the LIN pin.
0 = LIN wake-up is detected if there is a falling edge at the LIN pin followed a by dominant state > t_LINWU.
LINSHDB: LIN short de-bounce time configuration.
00 = LIN short is detected if it is longer than 96 cycles of OSCH/5 clock.
2:1 01 = LIN short is detected if it is longer than 128 cycles of OSCH/5 clock.
10 = LIN short is detected if it is longer than 192 cycles of OSCH/5 clock.
11 = LIN short is detected if it is longer than 255 cycles of OSCH/5 clock.
LINFAST: LIN fast mode enable bit.
0 1 = Fast mode is enabled.
0 = Fast mode is disabled.
Table 3.48 LINSTAT Register Bits Mapping
Name
Bit No
LINSTAT
7
6
5
4
3
2
1
0
Bit name
Reset
Access
Address
U
U
U
U
U
U
U
U
U
U
0x18
R/W = Read/Write ‘1’ bit; U = Unimplemented, read as ‘0’
0
0
0
R/W R/W R/W
Table 3.49 LINSTAT Register Bits Mapping
Bit Description
LINSHIF: LIN short interrupt flag.
2 1 = LIN short has been detected, and the transmitter is disabled.
0 = LIN short has not been detected.
LINDTOIF: LIN dominant time-out interrupt flag.
1 1 = Dominant time-out has been detected, and the transmitter is disabled.
0 = Dominant time-out has not been detected.
LINWUIF: LIN wake-up interrupt flag.
1 = Wake-up event has been detected on the LIN bus; i.e., the transition from SLEEP to NORMAL Mode is
0
caused by the LIN bus.
0 = Wake-up event has not been detected on the LIN bus; i.e. any transition from SLEEP to NORMAL
Mode has been caused by the WDT (see section 3.5.4).
Note: All LIN interrupt flags are cleared by writing ‘1’ in the corresponding LINSTAT bit.
© 2016 Integrated Device Technology, Inc.
98
January 26, 2016