ZAMC4100 Datasheet, PDF (120/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
The receiver is re-enabled again after reception of the next synchronization strobe. If the PID indicates that this
SW-LIN must transmit data bytes, there is no need to disable the receiver by writing 1 to the STOPRX bit in
Z1_LINCFG although it is allowed. The receiver is also disabled (and the transmitter is started) when the software
writes a byte to be transmitted into the TX buffer.
There is also the capability to completely disable the receiver so that it is not even re-enabled by an incoming
BREAK and SYNC field. This can be done by writing 1 to the DISABLERX bit in Z1_LINCFG. However, disabling
the receiver completely must only be done when the clock divider value will be changed, the system clock will be
stopped, or for debugging purposes when the LIN can operate as a transmitter only. In the first two cases,
disabling the receiver is required to avoid any malfunction. In addition to the receiver being disabled, the inactive
timer must also be switched off via the ENTOCNT bit in Z1_LINCFG.
Figure 4.10 RX Control and Status Signal Waveforms
SYNCDET
SYNCDET_R
RXENABLE_R
RXD
CLEARED BY SW
END OF STOP BIT
CLEARED BY SW
(STOPRX)
RXACTIVE_R
RXFULL_R
DATA READ by SW
_R = REGISTERED SIGNAL
4.9.5. Description of Transmit Operation
A transmission is started by writing the data to be transmitted into the TX buffer. It is in the responsibility of the
software to start the transmitter only when needed (correct PID was received) taking the LIN protocol into
account. When data is written into the TX buffer, the receiver is disabled (RXEN and RXACTIVE bits are set to 0
in the Z1_LINCFG register; see Table 4.25) and the transmitter is started (TXACTIVE bit is set to 1 in LINCFG).
The TXEMPTY flag bit in the Z1_LINSTAT register (Table 4.26) is cleared on write access to the TX buffer. It is
immediately set again in the next cycle as the data to be transmitted is copied into the shift register allowing the
software to write the next byte to be transmitted into the TX buffer. If software attempts to write into the TX buffer
while it already contains data (TXEMPTY bit is 0 in Z1_LINSTAT), the written byte is rejected and the WRCOLL
bit in LINSTAT is set. This flag will be cleared on a READ access to the status register.
© 2016 Integrated Device Technology, Inc.
120
January 26, 2016