ZAMC4100 Datasheet, PDF (66/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
3.9.1. High-Side Control and Status Register
Table 3.20 HSDCTRL Register Bits Mapping
Name
HSDCTRL
Bit No
7
6
5
4
3
2
1
0
Bit name
Reset
0
0
0
0
0
0
0
0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Address
0x08
R/W = Read/Write
Table 3.21 HSDCTRL Register Bits Description
Bit Description
HSxCSEN: ^{1), 2)} Current source enable bit for high-side driver x, (x = 4 to 1).
7:4 1 = The current source of high-side driver x is enabled.
0 = The current source of high-side driver x is disabled.
HSxEN: ^{2), 3), 4)} High-side driver enable.
1 = High-side driver x (x = 4 to 1) enabled.
3:0
0 = High-side driver x (x = 4 to 1) disabled.
Note: Bits HSxEN are automatically cleared at SLEEP or STANDBY Mode entry.
1) To keep current consumption as low as possible, the MCU software should disable the current sources before enabling the SLEEP or STANDBY Modes.
2) These bits are automatically cleared in the event of an over-temperature event.
3) Bits HSxEN are automatically cleared at SLEEP or STANDBY Mode entry.
4) These bits are gated if failure event (OVT, OC, OV, UV, CPVE) is captured in interrupt flag (see Figure 3.14).
3.9.2. High-Side Over-Current Protection
The high-side over-current protection circuitry is identical to the protection for the half-bridge driver previously
discussed in section 3.8.2.
3.9.3. High-Side Drivers Output Diagnostic Check
Each high-side driver has a dedicated diagnostic circuitry that is able to detect an open/short failure in the output
load. The diagnostic functionality is controlled and monitored respectively by registers HSDCTRL (Table 3.20 and
Table 3.21) and HSDSTAT (Table 3.22 and Table 3.23). Table 3.24 gives the meaning of the HSxOSF flags in the
HSDSTAT register with respect to the value of bit HSxCSEN in the HSDCTRL register, which controls the
corresponding diagnostic current source.
© 2016 Integrated Device Technology, Inc.
66
January 26, 2016