ZAMC4100 Datasheet, PDF (62/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Case B: The over-current event occurs and then is resolved after 10µs. The counter will increment for
10µs and then decrement for 10µs until its value is back to zero.
Case C:
There are three consecutive over-current events of 10µs duration with 5µs intervening pauses. In
this case, the counter increments for 10µs, then decrements for 5µs, again increments for 10µs
and so on. The process continues until the counter value reaches 20µs, the interrupt flag is set,
and the MOSFET is disabled.
Case C shows the main idea of the counter integrator concept: consecutive over-current events with a duration
shorter than 20µs are integrated over the time period and can set the over-current flag, which disables the driver.
This guarantees no chip overheating in the case of frequent over-current events shorter than 20µs.
Figure 3.13 Operation Principle of Over-Current Counter Integrator
HS or LS Over-
Current Event
Case A
Case B
Case C
0
OC Counter
(integrator)
20µs
0
HBxOCIF
10 20 30 40 50 60 70 80 90 100 110
20µs
10µs
10µs
5µs
15µs
10µs
10 20 30 40 50 60 70 80 90 100 110
HBxOCIF clear
t [µs]
t [µs]
0 10 20 30 40 50 60 70 80 90 100 110
Note: One counter step = 250ns
t [µs]
© 2016 Integrated Device Technology, Inc.
62
January 26, 2016