ZAMC4100 Datasheet, PDF (52/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 3.8 IRQCTRL Register Bits Description
Bit Description
WDTIE: Watchdog timer interrupt enable bit during STANDBY Mode.
1 = WDT interrupt is enabled.
7
0 = WDT interrupt is disabled.
Note: This interrupt is generated only when the system is in STANDBY Mode.
OVTIE: Over-temperature interrupt enable bit.
6 ^{1 = OVT interrupt is enabled.}
0 = OVT interrupt is disabled. Important: If an over-temperature event occurs, the drivers will be shut down
automatically regardless of the interrupt enable bit status.
SEIE: Supply error (over-voltage or under-voltage) interrupt enable bit.
5 1 = Supply error interrupt is enabled.
0 = Supply error interrupt is disabled.
ADCTIE: Global ADC interrupt enable bit.
4 1 = ADC interrupt is enabled.
0 = ADC interrupt is disabled.
HBOCIE: Global half-bridge driver over-current interrupt enable bit.
3 1 = Half-bridge driver over-current interrupt is enabled.
0 = Half-bridge driver over-current interrupt is disabled.
HSOCIE: Global high-side driver over-current interrupt enable bit.
2 1 = High-side driver over-current interrupt is enabled.
0 = High-side driver over-current interrupt is disabled.
ECMOCIE: Electrochromatic mirror (ECM) driver over-current interrupt enable bit.
1 1 = ECM over-current interrupt is enabled.
0 = ECM over-current interrupt is disabled.
LINIE: Global LIN PHY interrupt enable bit.
0 1 = LIN PHY interrupt is enabled.
0 = LIN PHY interrupt is disabled.
© 2016 Integrated Device Technology, Inc.
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January 26, 2016