ZAMC4100 Datasheet, PDF (70/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
3.10.3. Drivers PWM Control
The PWM signal is propagated to all half-bridge and high-side drivers. Each driver has a PWM enable bit that
determines whether the driver’s output is pulse-width modulated or not. The PWM enable bits for all drivers are
mapped to register PWMDREN (see Table 3.25 and Table 3.26). If needed, the MCU can enable simultaneous
PWM control for two or more drivers by setting more PWM enable bits in register PWMDREN.
Once the PWM is enabled (PWMDCFG ≠ 0), the write access to register PWMDREN is disabled. In order to
enable the PWM control for another driver, the MCU must disable the PWM generation (write PWMDCFG =
00_HEX) and then modify the value of the PWMDREN register. For a successful PWMDREN change, the following
sequence is recommended:
1) Disable the PWM by writing to PWMDCFG = 00_HEX
2) Wait for a time longer than one PWM period to ensure that register PWMDCFG is updated; i.e. PWM is
disabled. This requirement comes from the ZAMC4100 PWM glitch-free feature (see section 3.10.1).
3) Write the new value in register PWMDREN
4) Enable the PWM again (PWMDCFG ≠ 0x00)
Table 3.25 PWMDREN Register Bits Mapping
Name
PWMDREN
Bit No
7
6
5
4
3
2
1
0
Bit name
Reset
0
0
0
0
0
0
0
0
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Address
0x1B
R/W = Read/Write bit
Table 3.26 PWMDREN Register Bits Description
Bit Description
HSxPWMEN: ^{1), 2)} Enables PWM control for high-side drivers x (x = 1 to 4).
7:4 1 = The output of the corresponding high-side driver is pulse-width modulated.
0 = There is no pulse width modulation at the driver’s output.
HBxPWMEN: ^{1), 2)} Enables PWM control for half-bridge drivers x (x = 1 to 4).
3:0 1 = The output of the corresponding half/bridge driver is pulse-width modulated.
0 = There is no pulse width modulation at the driver’s output.
1) Bits HSxPWMEN and HBxPWMEN are automatically cleared at SLEEP or STANDBY Mode entry.
2) When all bits of the PWMDREN register are 0, the PWM module is disabled.
© 2016 Integrated Device Technology, Inc.
70
January 26, 2016