ZAMC4100 Datasheet, PDF (12/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 3.20
Table 3.21
Table 3.22
Table 3.23
Table 3.24
Table 3.25
Table 3.26
Table 3.27
Table 3.28
Table 3.29
Table 3.30
Table 3.31
Table 3.32
Table 3.33
Table 3.34
Table 3.35
Table 3.36
Table 3.37
Table 3.38
Table 3.39
Table 3.40
Table 3.41
Table 3.42
Table 3.43
Table 3.44
Table 3.45
Table 3.46
Table 3.47
Table 3.48
Table 3.49
Table 3.50
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Table 4.5
Table 4.6
Table 4.7
HSDCTRL Register Bits Mapping.................................................................................................... 66
HSDCTRL Register Bits Description ............................................................................................... 66
HSDSTAT Register Bits Mapping .................................................................................................... 67
HSDSTAT Register Bits Description................................................................................................ 67
High-Side Diagnostic Bits Description ............................................................................................. 67
PWMDREN Register Bits Mapping.................................................................................................. 70
PWMDREN Register Bits Description ............................................................................................. 70
ECMCTRL Register Bits Mapping ................................................................................................... 75
ECMCTRL Register Bits Description ............................................................................................... 75
ECMDIAG Register Bits Mapping .................................................................................................... 76
ECMDIAG Register Bits Description................................................................................................ 76
ECMOSF Diagnostic Bit Meaning.................................................................................................... 77
AINCONF Register Bits Mapping .................................................................................................... 80
AINCONF Register Bits Description ................................................................................................ 81
ADCCTRL Register Bits Mapping.................................................................................................... 82
ADCCTRL Register Bits Description ............................................................................................... 82
Input MUX Control Bits Description ................................................................................................. 83
ADCCONF Register Bits Mapping ................................................................................................... 86
ADCCONF Register Bits Description............................................................................................... 86
ADCSTAT Register Bits Mapping .................................................................................................... 87
ADCSTAT Register Bits Description................................................................................................ 87
ADC Sample-Rate Configuration ..................................................................................................... 88
ADCCMPH and ADCCMPL Bits Description ................................................................................... 91
AINDIAG Register Bits Mapping ...................................................................................................... 93
AINDIAG Register Bits Description.................................................................................................. 93
External ADC Inputs Diagnostic Bits Description ............................................................................ 94
LINCTRL Registers Bit Mapping..................................................................................................... 97
LINCTRL Registers Bits Description................................................................................................ 98
LINSTAT Register Bits Mapping ...................................................................................................... 98
LINSTAT Register Bits Mapping ...................................................................................................... 98
SBC Registers Address Map ......................................................................................................... 100
MCU Memory Map......................................................................................................................... 104
INFO Page 0 Structure .................................................................................................................. 107
MCU Peripheral Interrupts ............................................................................................................. 111
Configuration of Timer Trigger Behavior........................................................................................ 113
Register [0x4000_0000] SYS_CLKCFG ........................................................................................ 123
Register [0x4000_0004] SYS_MEMPORTCFG ............................................................................ 123
Register [0x4000_0008] SYS_MEMINFO ..................................................................................... 124
© 2016 Integrated Device Technology, Inc.
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January 26, 2016