ZAMC4100 Datasheet, PDF (90/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Left-Justified ADC Results
This setting applies when bit RESJSTF = 0. The digitized data of bits [9:2] go to ADCRESH, while the remaining
bits [1:0] go to ADCRESL as shown in Figure 3.24. For correct SPI extraction of the result, the ADRESH is read
first, where it clears the interrupt flag ADCRDYIF as well as updating the value ADCRESL. This guarantees
protection of the results from the next conversion.
Right-Justified ADC Results
This setting applies when bit RESJSTF = 1. The digitized data of bits [7:0] go to ADCRESL, while the remaining
bits [9:8] go to ADCRESH as shown in Figure 3.24. For correct SPI extraction of the result, the ADRESL is read
first, where it clears the interrupt flag ADCRDYIF as well as updating the value ADCRESH. This guarantees
protection of results from the next conversion.
Signed or Unsigned ADC Results
Bit RESSIGN configures the signed or unsigned result format when the ADC is performing ratiometric conversion.
When RESSIGN = 0, the ADC result is represented as unsigned value. When RESSIGN = 1, the ADC result is
represented as signed value.
Note: If the ADC is performing absolute or temperature conversion, the result is unsigned regardless of the value
of the RESSIGN bit.
Note: For the right-justified signed results format, the unused bits of ADCRESH have the value of the sign bit.
Figure 3.24 ADC Result Formatting Options
LEFT JUSTIFIED
7
ADCRESH 0 7 6 ADCRESL
Read 0
Unsigned RESSIGN = 0
7
ADCRESH 0 7 6 ADCRESL
S
Read 0
Signed RESSIGN = 1
S = Sign bit:
0 = Positive result
1 = Negative result
9
2 1 0 _{=> RESCODE (ADCRES[9:0])}
(Software Variable)
RIGHT JUSTIFIED
7 ADCRESH
Read 0
7 ADCRESH
Read S
1 0 7 6 _ADCRESL
1 0 7 6 ADCRESL
S
9 87
0
Unsigned RESSIGN = 0
0
Signed RESSIGN = 1
S = Sign bit:
0 = Positive result
1 = Negative result
0 => RESCODE (ADCRES[9:0])
(Software Variable)
© 2016 Integrated Device Technology, Inc.
90
January 26, 2016