ZAMC4100 Datasheet, PDF (37/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 3.1 RSTSTAT Register Bits Mapping
Name
RSTSTAT
Bit No
7
6
5
4
3
2
1
0
Bit name
Reset
0
0
0
0
0
0
Access
R/Wc R/Wc R/Wc R/Wc R/Wc R/Wc
Address
0x00
R/Wc = Read/Write ‘1’ to clear; U = Unimplemented, read as ‘0.’
0
R/Wc
1
R/Wc
Table 3.2 RSTSTAT Register Bits Description
Bit Description
OSCLEIF: Low frequency oscillator (OSCL) error interrupt flag.
7 1 = The 125kHz clock has stopped due to OSCL failure.
0 = The OSCL is operating and the 125kHz clock is present.
CPVEIF: Charge pump voltage error interrupt flag.
6
1 = The charge pump voltage is out of range during driver operation or in the act of driver enabling. If this event
occurs, all drivers are automatically disabled.
0 = Charge pump voltage is in range.
OVIF: Overvoltage interrupt flag.
5 1 = Overvoltage event occurred. If OVDP=1, all drivers are automatically disabled (see Table 3.5).
0 = Overvoltage event did not occur.
UVIF: Under-voltage interrupt flag.
4 1 = Under-voltage event occurred. If UVDP=1, all drivers are automatically disabled (see Table 3.5).
0 = Under-voltage event did not occur.
OVTIF: Over-temperature interrupt flag
3 1 = Over-temperature event occurred, and all drivers are disabled.
0 = Over-temperature event did not occur.
WDTSYSF: Watchdog timer system reset flag.
2 1 = The MCU has failed several times in clearing the WDT timer and system reset was generated.
0 = There is no system reset by WDT.
WDTMCUF: Watchdog timer MCU reset flag.
1 1 = MCU reset was caused by the WDT.
0 = There is no MCU reset by WDT.
PORF: Power-on-reset flag.
0 1 = System reset was caused by the POR block.
0 = There is no system reset by the POR block.
© 2016 Integrated Device Technology, Inc.
37
January 26, 2016