ZAMC4100 Datasheet, PDF (61/155 Pages) Integrated Device Technology – Actuator and Motor Controller

ZAMC4100 Datasheet
Table 3.15 HBDSTAT Register Bits Mapping
Name
HBDSTAT
Bit No
7
6
5
4
3
2
1
0
Bit name
Reset
0
0
0
0
Access
R
R
R
R
Address
R/Wc = Read/Write 1 to clear, R = Read-only
0
R/Wc
0x0A
0
R/Wc
0
R/Wc
0
R/Wc
Table 3.16 HBDSTAT Register Bit Descriptions
Bit Description
HBxOSF: Open/short status flag for half-bridge driver x (x = 4 to 1, for HB4 to HB1 respectively). This flag is not
registered; i.e., its value stays as long as the diagnostic event takes place.
7:4
The meaning of these bits depends on the settings of bits HBxCSLEN and HBxCSHEN of the HBDDIAG register and
are given in Table 3.19 as explained in section 3.8.3.
HBxOCIF: Over-current interrupt flag for half-bridge driver x (x = 4 to 1, for HB4 to HB1 respectively). See section
3.8.2.
3:0 _{1 = There is an over-current in the output of driver x. The driver x is disabled as long as this bit is set.}
0 = There is no over-current in the output of driver x.
3.8.2. Half-Bridge Over-Current Protection
In the case of an over-current event, the corresponding driver automatically limits the current in order to prevent
damage in the MOSFET stage. If the over-current condition continues more than 20µs, the corresponding
interrupt flag (HBxOCIF; Table 3.16) is set and the driver is automatically disabled. The MCU can re-enable the
driver by clearing its interrupt flag. If the over-current condition still exists after 20µs, the driver will be disabled
again.
The time of 20µs is counted by a counter functioning like an integrator. The counter works in increment or
decrement mode determined by following conditions:
• The counter only increments per unit time in response to an over-current occurrence.
• The counter only decrements (to zero) per unit time in response to normal current operation.
Figure 3.13 illustrates the over-current function using three typical examples of over-current occurrences in an
application:
Case A: Operating with persistent over-current occurrence for more than 20µs. The counter increments
constantly until expiration after 20µs, the interrupt flag is set, and the MOSFET is automatically
disabled.
© 2016 Integrated Device Technology, Inc.
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January 26, 2016